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EVE 1.0
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Driver for SC16IS740/SC16IS750/SC16IS760 chip UART and GPIO. More...

Go to the source code of this file.
Data Structures | |
| struct | sc16_reg_workitem_t |
| struct | sc16_uart_state_t |
| struct | sc16_uart_t |
| struct | gpio_ext_sc16_t |
| struct | sc16_chip_t |
Macros | |
| #define | SC16_REG_RHR 0x00 |
| RHR/THR Receive Holding / Transmit Holding. More... | |
| #define | SC16_REG_THR 0x00 |
| RHR/THR Receive Holding / Transmit Holding. | |
| #define | SC16_REG_IER 0x01 |
| IER Interrupt Enable. | |
| #define | SC16_REG_FCR 0x02 |
| FCR/IIR FIFO Control. | |
| #define | SC16_REG_IIR 0x02 |
| FCR/IIR FIFO Control. | |
| #define | SC16_REG_LCR 0x03 |
| LCR Line Control. | |
| #define | SC16_REG_MCR 0x04 |
| MCR Modem Control. | |
| #define | SC16_REG_LSR 0x05 |
| LSR Line Status. | |
| #define | SC16_REG_MSR 0x06 |
| MSR/TCR Modem Status / Transmission Control (TCR is selected by EFR[4] = 1 and MCR[2] = 1) | |
| #define | SC16_REG_TCR 0x06 |
| MSR/TCR Modem Status / Transmission Control (TCR is selected by EFR[4] = 1 and MCR[2] = 1) | |
| #define | SC16_REG_TLR 0x07 |
| TLR Trigger Level (can only be written to when EFR[4] = 1 and MCR[2] = 1) | |
| #define | SC16_REG_TXLVL 0x08 |
| TXLVL Transmitter FIFO Level. | |
| #define | SC16_REG_RXLVL 0x09 |
| RXLVL Receiver FIFO Level. | |
| #define | SC16_REG_IODIR 0x0A |
| SC16_REG_DIRECTION. | |
| #define | SC16_REG_IOSTATE 0x0B |
| SC16_REG_PORT. | |
| #define | SC16_REG_IOINT 0x0C |
| SC16_REG_INT_MASK. | |
| #define | SC16_REG_IOCTRL 0x0E |
| SC16_REG_CONTROL. | |
| #define | SC16_REG_EFCR 0x0F |
| EFCR Extra Features Control. | |
| #define | SC16_REG_DLL 0x00 |
| Division register low. More... | |
| #define | SC16_REG_DLH 0x01 |
| Division register high. | |
| #define | SC16_REG_EFR 0x02 |
| EFR Enhanced Features Register - Set LCR to 0xBF to access it! More... | |
| #define | SC16_REG_XON1 0x04 |
| XON1 char. | |
| #define | SC16_REG_XON2 0x05 |
| XON2 char. | |
| #define | SC16_REG_XOFF1 0x06 |
| XOFF1 char. | |
| #define | SC16_REG_XOFF2 0x07 |
| XOFF2 char. | |
| #define | SC16_BIT_IER_CTS (1 << 7) |
| CTS interrupt enable. More... | |
| #define | SC16_BIT_IER_RTS (1 << 6) |
| RTS interrupt enable. | |
| #define | SC16_BIT_IER_XOFF (1 << 5) |
| Xoff interrupt enable. | |
| #define | SC16_BIT_IER_SLEEP (1 << 4) |
| enable Sleep mode enable | |
| #define | SC16_BIT_IER_MODEM (1 << 3) |
| Modem Status Interrupt enable. | |
| #define | SC16_BIT_IER_LINE (1 << 2) |
| Receive Line Status interrupt enable. | |
| #define | SC16_BIT_IER_TX (1 << 1) |
| Transmit Holding Register interrupt enable. | |
| #define | SC16_BIT_IER_RX (1 << 0) |
| Receive Holding Register interrupt enable. | |
| #define | SC16_SHIFT_FCR_RX_TRIGGER (6) |
| 2 bits defining RX trigger. Sets the trigger level for the RX FIFO More... | |
| #define | SC16_SHIFT_FCR_TX_TRIGGER (4) |
| 2 bits defining TX trigger. Sets the trigger level for the TX FIFO. | |
| #define | SC16_BIT_FCR_RESET_TX (1 << 2) |
| reset TX FIFO | |
| #define | SC16_BIT_FCR_RESET_RX (1 << 1) |
| reset RX FIFO | |
| #define | SC16_BIT_FCR_FIFO_ENABLE (1 << 0) |
| FIFO enable. | |
| #define | SC16_BIT_IIR_NONE 0x01 |
| No interrupts pending. More... | |
| #define | SC16_BIT_IIR_THR 0x02 |
| THR interrupt. | |
| #define | SC16_BIT_IIR_RHR 0x04 |
| RHR interrupt. | |
| #define | SC16_BIT_IIR_RXE 0x06 |
| Receive Line Status error. | |
| #define | SC16_BIT_IIR_RTO 0x0C |
| Receiver time-out interrupt. | |
| #define | SC16_BIT_IIR_IO 0x30 |
| Input pin change of state. | |
| #define | SC16_BIT_LCR_DIVISOR_LATCH (1 << 7) |
| divisor latch enable More... | |
| #define | SC16_BIT_LCR_BREAK (1 << 6) |
| Break control bit. When enabled, the break control bit causes a break condition to be transmitted. | |
| #define | SC16_BIT_LCR_PARITY_FORCED (1 << 5) |
| forced parity (inverted SC16_BIT_LCR_PARITY_EVEN) | |
| #define | SC16_BIT_LCR_PARITY_EVEN (1 << 4) |
| parity type (odd/even) | |
| #define | SC16_BIT_LCR_PARITY_ENABLE (1 << 3) |
| parity enable | |
| #define | SC16_BIT_LCR_STOPS (1 << 2) |
| Number of stop bits. | |
| #define | SC16_SHIFT_LCR_WORD_LENGTH (0) |
| 2 bits for selection of Word length | |
| #define | SC16_BIT_MCR_CLOCK_DIVISOR (1 << 7) |
| 0 = clock/1, 1 = clock/4 More... | |
| #define | SC16_BIT_MCR_IRDA (1 << 6) |
| 0 = normal UART mode, 1 = IrDA mode | |
| #define | SC16_BIT_MCR_XON_ANY (1 << 5) |
| 1 = enable Xon Any function | |
| #define | SC16_BIT_MCR_LOOPBACK (1 << 4) |
| 1 = enable local Loopback mode | |
| #define | SC16_BIT_MCR_TCR_ENABLE (1 << 2) |
| enable the TCR and TLR register. | |
| #define | SC16_BIT_MCR_FORCE_RTS (1 << 1) |
| 0 = force RTS to inactive (HIGH), 1 = force RTS to active (LOW). | |
| #define | SC16_BIT_MCR_FORCE_DTR (1 << 0) |
| Force DTR. Only in modem mode! | |
| #define | SC16_BIT_LSR_FIFO_ERR (1 << 7) |
| FIFO data error. More... | |
| #define | SC16_BIT_LSR_TX_EMPTY (1 << 6) |
| THR and TSR empty. This bit is the Transmit Empty indicator. | |
| #define | SC16_BIT_LSR_THR_EMPTY (1 << 5) |
| Transmit Holding Register Empty indicator. | |
| #define | SC16_BIT_LSR_BREAK (1 << 4) |
| A break condition occurred. | |
| #define | SC16_BIT_LSR_FRAME_ERR (1 << 3) |
| received data did not have a valid stop bit | |
| #define | SC16_BIT_LSR_PARITY_ERR (1 << 2) |
| parity error in data being read from RX FIFO | |
| #define | SC16_BIT_LSR_OVERRUN (1 << 1) |
| overrun error has occurred | |
| #define | SC16_BIT_LSR_RX_READY (1 << 0) |
| there is at least one character in the RX FIFO | |
| #define | SC16_SHIFT_TCR_FIFO_RESUME (4) |
| 4 bits for RX FIFO level to resume transmission More... | |
| #define | SC16_SHIFT_TCR_FIFO_HALT (0) |
| 4 bits for RX FIFO level to halt transmission | |
| #define | SC16_SHIFT_TLR_RX_FIFO (4) |
| 4 bits for RX FIFO levels (4 to 60) to generate interrupt More... | |
| #define | SC16_SHIFT_TLR_TX_FIFO (0) |
| 4 bits for TX FIFO levels (4 to 60) to generate interrupt | |
| #define | SC16_BIT_EFCR_IRDA_MODE (1 << 7) |
| IrDA mode. More... | |
| #define | SC16_BIT_EFCR_RTS_INVERT (1 << 5) |
| invert RTS signal in RS-485 mode | |
| #define | SC16_BIT_EFCR_RTS_AUTO (1 << 4) |
| enable the transmitter to control the RTS pin | |
| #define | SC16_BIT_EFCR_TX_OFF (1 << 2) |
| Disable transmitter. | |
| #define | SC16_BIT_EFCR_RX_OFF (1 << 1) |
| Disable receiver. | |
| #define | SC16_BIT_EFCR_9BIT (1 << 0) |
| Enable 9-bit or Multidrop mode (RS-485) | |
| #define | SC16_BIT_EFR_CTS_ON (1 << 7) |
| CTS flow control enable. More... | |
| #define | SC16_BIT_EFR_RTS_ON (1 << 6) |
| RTS flow control enable. | |
| #define | SC16_BIT_EFR_SPECIAL_CHAR (1 << 5) |
| Special character detect (in XOFF2 register) | |
| #define | SC16_BIT_EFR_ENHANCED_ON (1 << 4) |
| Enhanced functions enable. | |
| #define | SC16_SHIFT_EFR_FLOW_CTRL (0) |
| 4 bits for flow control selection | |
| #define | SC16_EFR_ACCESS 0xBF |
| This value should be written to LCR register in order to access EFR. | |
| #define | SC16_BIT_IOCTRL_SRESET (1 << 3) |
| Software reset. A write to bit will reset the device. Once the device is reset this bit is automatically set to ‘0’ More... | |
| #define | SC16_BIT_IOCTRL_GPIO_ON (1 << 1) |
| This bit programs GPIO[7:4] as I/O pins or modem RI, CD, DTR, DSR pins. 0 = I/O pins, 1 = modem. | |
| #define | SC16_BIT_IOCTRL_IOLATCH (1 << 0) |
| Enable/disable inputs latching (keep value caused interrupt in IOState until it is read) | |
| #define | SC16_CHANNEL_A 0 |
| Select channel A UART on sc16is750, the only setting on sc16is740. | |
| #define | SC16_CHANNEL_B 1 |
| Select channel B UART on sc16is750. | |
| #define | SC16_FIFO_SIZE 64 |
| Tx/Rx FIFO length. | |
Enumerations |
Functions | |
| void | Sc16OutPort (const struct gpio_ext_t *GpioExt, uint8_t Address, uint16_t Data) |
| Synchronous function writes SC16 register asynchronously and waits for the end of the operation. Uses internally by inline functions. | |
| uint16_t | Sc16InPort (const struct gpio_ext_t *GpioExt, uint8_t Address) |
| Synchronous function reads SC16 register asynchronously and waits for the end of the operation. Uses internally by inline functions. | |
| static void | GpioExtInitSc16 (const struct gpio_ext_t *GpioExt) |
| Initialize GPIO expander. More... | |
| static void | GpioExtDisableSc16 (const struct gpio_ext_t *GpioExt) |
| De-initialize IO expander. More... | |
| static uint16_t | GpioExtInPortSc16 (const struct gpio_ext_t *GpioExt) |
| Read 8-bits data from GPIO port. More... | |
| static void | GpioExtOutPortSc16 (const struct gpio_ext_t *GpioExt, uint16_t Data) |
| Write 8-bits data to GPIO port. More... | |
| static void | GpioExtSetDirectionSc16 (const struct gpio_ext_t *GpioExt, uint16_t Direction) |
| Set pins direction to GPIO port. More... | |
| static void | GpioExtSetPullSelectSc16 (const struct gpio_ext_t *GpioExt, uint16_t PullSelect) |
| Select pullup or pulldown for GPIO port. More... | |
| static void | GpioExtSetPullEnableSc16 (const struct gpio_ext_t *GpioExt, uint16_t PullEnable) |
| Enable pullup/pulldown to GPIO port. More... | |
| static void | GpioExtSetInterruptsSc16 (const struct gpio_ext_t *GpioExt, uint16_t Mask) |
| Enable/disable interrupts on input GPIO pins. More... | |
| static void | GpioExtSetLatchSc16 (const struct gpio_ext_t *GpioExt, uint16_t Mask) |
| Enable/disable latching values on input GPIO pins after interrupt until they are read. More... | |
| static void | GpioExtSetDriveSc16 (const struct gpio_ext_t *GpioExt, uint8_t Values[]) |
| Set drive level for output pins. More... | |
Internally synchronous functions | |
| void | Sc16Init (const struct sc16_chip_t *Chip) |
| void | UartSc16Init (const struct uart_t *Uart) |
| void | UartSc16Disable (const struct uart_t *Uart) |
| bool | UartSc16IsBusyTx (const struct uart_t *Uart) |
| void | UartSc16ResetFifo (const struct uart_t *Uart, bool Tx, bool Rx) |
| void | UartSc16SetBaudrate (const struct uart_t *Uart) |
| void | UartSc16SetRxTimeouts (const struct uart_t *Uart, uint32_t RxStartTimeoutUs, uint32_t RxStopTimeoutUs) |
Internally asynchronous functions | |
| void | UartSc16CancelTx (const struct uart_t *Uart) |
| void | UartSc16StartBasicTx (const struct uart_t *Uart, uint8_t *DataSrc, uint16_t DataSize, uart_tx_callback_t Callback, void *CallbackData) |
| void | UartSc16StartBasicRx (const struct uart_t *Uart, uint8_t *DataDest, uint16_t DataSize, uart_rx_callback_t Callback, void *CallbackData) |
| void | UartSc16StartPingPongTx (const struct uart_t *Uart, uint8_t *PrimDataSrc, uint16_t PrimDataSize, uint8_t *AltDataSrc, uint16_t AltDataSize, uart_tx_callback_t Callback, void *CallbackData) |
| void | UartSc16StartPingPongRx (const struct uart_t *Uart, uint8_t *PrimDataSrc, uint16_t PrimDataSize, uint8_t *AltDataSrc, uint16_t AltDataSize, uart_rx_callback_t Callback, void *CallbackData) |
| void | UartSc16RefreshPingPongTx (const struct uart_t *Uart, uint8_t *DataSrc, uint16_t DataSize, bool Stop) |
| void | UartSc16RefreshPingPongRx (const struct uart_t *Uart, uint8_t *DataDest, uint16_t DataSize, bool Stop) |
| void | UartSc16CancelRx (const struct uart_t *Uart) |
| bool | UartSc16IsBusyRx (const struct uart_t *Uart) |
| void | UartSc16SendBreak (const struct uart_t *Uart, uart_break_callback_t Callback, void *CallbackData) |
| void | UartSc16SetRts (const struct uart_t *Uart, bool Active) |
| void | UartSc16InterruptHandler (struct work_t *Work) |
Variables | |
| const struct uart_api_t | UartSc16Func |
| const struct gpio_ext_api_t | GpioSc16Func |
Driver for SC16IS740/SC16IS750/SC16IS760 chip UART and GPIO.
Definition in file sc16is7x0.h.